1. Field of the Invention
The present invention relates to a transistor characteristic calculation apparatus using a large signal equivalent circuit model of a transistor that is used mainly in a VHF band, a UHF band, a microwave band, and a millimeter wave band.
2. Description of Related Art
In order to calculate the characteristics of a transistor, a large signal equivalent circuit model shown in Non-Patent Reference 1 (“Microwave transistors”, Yoichiro Takayama, the Institute of Electronics, Information and Communication Engineers, pp. 142-147, Dec. 10, 1998) is used, and the RF characteristics of a small signal and a large signal can be calculated.
The equivalent circuit model is such that the characteristics of the transistor are represented by electrically equivalent circuit elements, and when the representation is used, it is possible to calculate the characteristics on a circuit simulator at a high speed without solving a complicated physical equation.
FIG. 11 is a view showing a correspondence between the physical structure of a conventional transistor and an equivalent circuit model thereof.
A circuit configuration thereof is basically the same as that of the circuit described in the above Non-Patent Reference 1.
As a model in which the calculation accuracy of the equivalent circuit is improved, a model shown in Patent Reference 1 (Japanese Patent Application Laid-open No. 2002-280571) is also reported.
However, when the above model is applied to a GaN HEMT (High Electron Mobility Transistor) device (especially a GaN HEMT on Si device), there occurs a problem such that calculation accuracy thereof is degraded.
In the case of the GaN HEMT on Si, although GaN is epitaxially grown on an Si substrate, Si and GaN have different lattice constants, and therefore a trap (a fracture capturing an electron) resulting from lattice unconformity occurs at an interface thereof.
The trap has an effect on RF characteristics thereof; however, in the conventional model, such an effect is not considered, which degrades the calculation accuracy.
FIG. 12 shows comparison graphs between measurement results and calculation results in the input/output characteristics of the conventional model.
A thin line indicates the measurement result, while a thick line indicates the calculation result.
It can be seen that with regard to an output power (Pout), a gain (Gain), and a gate current (Ig), the calculation results are approximate to the measurement results and excellent in calculation accuracy, but with regard to a drain current (Idq), a drain efficiency (ED), and a power added efficiency (PAE), the calculation results deviate from the measurement results in the vicinity of the saturation power and poor in calculation accuracy.
In addition, FIG. 13 shows a comparison graph between the measurement results and the calculation results in conventional load pull contours (contour map of efficiency to impedance).
A thin line indicates the measurement results, and a thick line indicates the calculation results.
It can be seen that the optimum impedances and contours in the measurement results and calculation results are deviated from each other.
As mentioned above, since the effect of the trap is not considered in the conventional model, there is a problem such that the characteristics of the transistor cannot be calculated with high accuracy.